For many electronic design professionals, it has become clear that the industry is transitioning through an inflection point that is shifting some of the ground rules of design.
The increase in the speed and integration density in today’s systems are blurring the lines between chip design and traditional board or system design. This finds its fullest expression in multi-die, 3D integrated circuits, which have become the norm for HPC designs.
At the same time, multiphysics – the simultaneous analysis of multiple physical effects – is at the heart of another profound and challenging shift in electronic design practice. By merging previously distinct physics disciplines while adding novel physics to the equation, it is driving a step-function in the technical expertise required by electronic design teams.
Multiphysics is the new normal
A concrete example of how the facts on the ground are rapidly evolving include the increasing focus on thermal analysis, as it has become apparent that heat dissipation is probably the No. 1 limiting factor in 3D-IC integration density. To see also : Industry analysis of Digital Pump Controller Is Set To Garner. But thermal gradients across heterogeneous components inevitably leads to differential expansion, which results in mechanical stress and warpage of a package.
Warping impacts the system reliability directly, but temperature also has less direct design effects. For example, it also lowers the maximum allowable current density to avoid electromigration reliability issues.
The higher speeds of signals coupled with larger physical sizes of multi-die systems make electromagnetic simulation a must – for not just the radio frequency (RF) designers, but also for high-performance computing (HPC) and artificial intelligence/machine learning (AI/ML) hardware. Inter-related physical effects such as these are driving the multiphysics revolution.
New signoff requirements
The semiconductor foundries have responded to the rise in 3D-IC design starts by supplementing their sign-off requirements and their recommended IC design flows to include the thermal, electromagnetic, and other tools that were previously relegated to OSATs or other outside vendors following fabrication. Most of the advanced 3D systems that have been brought to market so far were designed by large, leading semiconductor companies that have the resources and expertise to take advantage of the new technical opportunities. This may interest you : China, looking post-virus, to push tech autonomy at Congress, Telecom News, ET Telecom. But, in order to make 3D-IC design more accessible to mainstream design teams, the industry needs tools and design platforms that capture and automate these advanced multiphysics design requirements in practical workflows.
The old ways of working won’t cut it in this new reality. Design specialists with specific domain knowledge dispersed over multiple groups need to be brought together into vertically integrated design teams that make expertise available right from the get-go during system prototyping. Designers will need new tools, new training, and new methodologies to compete in this environment.
The best place to learn about the newest electronic design techniques from industry experts is to attend this year’s Ansys IDEAS Digital Forum: Innovative Designs Enabled by Ansys Solutions.
IDEAS is a digital event that takes place Sept. 22-23 and gathers many of the leading electronic design companies from across the world, including Nvidia, Qualcomm, Samsung, STMicroelectronics, Micron, Western Digital, Juniper Networks, Microchip and many more.
Attendees will have access to C-level executive keynote speeches from AMD, TSMC, Synopsys, Samsung Foundry, Keysight, Altium, and Cerebras. And Semiconductor Engineering’s own Ed Sperling will be moderating the IDEAS Executive Roundtable in a discussion on electronic design trends.
The IDEAS Agenda shows the unparalleled breadth and scope of multiphysics tools, solutions, and practical implementations, with 40 presentations in 10 technical tracks for electronic systems analysis, semiconductor signoff, photonics, cloud, and workflow solutions.
- Power Integrity
- Voltage-Timing Signoff
- Low Power Design
- Silicon to System Reliability
- Silicon Photonics
- Designing with Electromagnetics
- 3D-IC & Electrothermal Analysis
- System Analysis & Simulation
- Cloud & Workflow Automation
With a roundtable panel and executives from the design community and solution providers, you can get a quick and accurate impression of the state of the art in electronic design today – all from the comfort of your home office.
Registration for IDEAS is now open to all at ansys.com/ideas. Sign up and reserve your front seat for a showcase of the future of electronic design.
Marc Swinnen
Marc Swinnen is director of product marketing for the Semiconductor Division of Ansys. He holds Master’s and Bachelor’s Degrees in electrical-mechanical engineering and a Master’s Degree in industrial management from Katholieke Universiteit, as well as an MBA degree from San Jose State University.
