Week in review: design, low power

Intellectual Property

Flex Logix has signed an agreement with the Air Force Research Laboratory, Sensor Management (AFRL / RY) for any Flex Logix IP technology to be used in all U.S. Government-funded programs for unlicensed research and prototyping. “The first GlobalFoundries 12nm process was a great success with our first EFLX eFPGA license, with more than half a dozen projects in the first year with an EFLX license,” said Geoff Tate, CEO and founder of Flex Logix. “Since many USG programs start with successive proof-of-concept chips, before the programs were fully funded for production, it made sense to extend our agreement to include other process nodes. These programs will now have access to Flex Logix products from 40nm to 7nm in intermediate casting processes, along with processes such as radiation hardened by design implementations and future 5 nm.

Vidatronic added 5nm finFET power management IPs for integration into SoCs for advanced microprocessors and high-speed serial interface applications. The series includes various low voltage regulator (LDO) IPs, bandgap voltage reference IPs and integrated support blocks including power reset (POR), power-ok and DAC.

OpenEdges Technology announced its 12nm LPDDR5 / 4 / 4x ORBIT PHY IP. PHY uses a highly configurable channel and floor architecture to provide different types of DRAM packages and flexibility to sort lanes. It includes a proprietary programmed state machine (PSM) for accelerated firmware-based training and DFT functionality.

Arasan Chip Systems only released very low power MIPI D-PHY Tx IP and Rx IP for the GlobalFoundries 12nm finFET node. Using D-PHY as a standalone IP Tx and Rx saves field and power, especially for multi-camera interfaces, is suitable for laptops and IoT display applications, as well as multi-camera automotive SoCs.

Photonics

GlobalFoundries unveiled its silicon photonics platform, GF Fotonix, which combines 300mm photonics and 300GHz RF-CMOS features in a silicon host. Many companies announced support for the platform and process design kit (PDK).

Ansys and GF developed a process file, and customers can create custom components to consolidate complex single-chip processing for high-speed, low-power data transmission. The process file works in conjunction with Ansys Photonics Simulation Software, and designers can simulate 3D geometries with precision prediction, including straight layer thickness, material data, and more, depending on GF design flow and process design kit specifications. GF will also take advantage of the Ansys Lumerical Photonic Verilog-A Platform, which offers the ability to combine custom components and casting PDK components in the same circuit, both modeled using Verilog-A, and run a sophisticated simulation of two-way photonic circuits.

Cadence’s integrated electronic / photonic design environment has been optimized for GF Fotonix, providing a platform for electronic / photonic design, simulation, and analysis for mutual customers, and a robust set of features and APIs for creating and editing complex curvilinear shapes, waveguides, and more. du. photonics components.

Synopsys supports the GF-provided PDK with an extreme design flow, OptoCompiler, simulation and design rule verification (DRC), and schematic versus design (LVS) schematic capture and design synthesis. The unified platform supports PDK-driven design and custom design with Synopsys Photonic Device Compiler.

Other companies have announced that they are using or will use the following product platform:

Ayar Labs has been in strategic partnership with GF for several years to develop an optimized photonics and electronics platform using its monolithic I / O chiplet and multi-wavelength optical source in its package using high-volume manufacturing and high-volume process control. and existing CMOS materials. The two companies have also developed an advanced electro-optical PDK that will be released in Q2 in 2022.

Ranovus released 100G protocol-agnostic I / O chipsets and GF Fotonix-based IP cores that can be integrated with processors, switches, and memory tools to enable new data center architectures. Optical I / O can scale from 8 cores to 32 cores in the same footprint with Ranovus 100 Gbps wavelengths per EPV (Integrated Electro-Photonic Circuit) combined with monolithic cores, with its proprietary laser and advanced packaging technologies.

Xanadu will use the GF Fotonix platform to manufacture high-volume photonic chips to implement quantum error correction in universal quantum computers and fault tolerance. Xanadu’s architecture implements error correction in silicon photonic chips that are fully functional at room temperature, using photodetector technology borrowed from the optical telecommunications and lidar industries.

PsiQuantum will use the platform to develop custom silicon chip photonics.

Cisco Systems and GF are working on a customized silicon photonics solution for DCN and DCI applications, including interdependent PDKs.

Nvidia is working with GF to design high-bandwidth and low-power optical interconnects for some of its flagship data center products.

Lightmatter introduced a general purpose photonic AI inference accelerator. It supports a wide range of AI models, offers an optical interconnection of 6.4 Tbps for multi-blade scaling, 1TB DDR4 DRAM and 3TB solid state memory in a 4-U server blade factor. The company also announced a programmable photonic interconnect that integrates transistors and photonics, including lasers, modulators and photodetectors.

Marvell introduced the cloud-optimized integrated optical (CPO) technology platform to enable faster connectivity while reducing power consumption. The new platform includes highly integrated 2.5D / 3D silicon photonics including lasers, TIAs, controllers and PAM4 DSPs.

Wireless

Keysight licensed the Federal Communications Commission (FCC) Spectrum Horizons Experimental to develop 6G technology in the Terahertz (THz) frequency bands, between 95 GHz (GHz) and 3 THz. “Innovations in the sub-THz spectrum will help use cases such as immersion telepresence, digital twins, and extended reality, that is, real and virtual combined environments and human-machine interactions created by computer technology and laptops,” said Roger Nichols. Keysight’s 5G & amp; Director of the 6G program. “The use of the FCC Spectrum Horizons license enables Keysight to strengthen our commitment to 6G technology, which will enable innovators to pioneer in the new field of next-generation communications systems.”

Keysight has also updated its 5G network emulation solution to support the latest 3GPP Rel-15/16/17 features. Upgrades include extended frequency range coverage, flexible use of new, wider bandwidth RF resources, processing power> 10CC to support more carrier aggregation, improved uplink link capabilities, upscaling antenna switching and support for multi-angle testing, and multiple -SIM support.

Chips

Analog Devices will invest € 100 million (~ $ 110 million) over the next three years in ADI Catalyst, a 100,000-square-meter innovation and collaboration facility at its Raheen Business Park in Limerick, Ireland. It will focus on the development of software-enabled solutions and AI technologies in areas such as Industry 4.0, sustainable energy, automotive electrification and next-generation connectivity.

Sleepiz used Infineon’s XENSIV 60 GHz radar technology in a sleep monitoring system, from smart speakers that can be integrated into a connected smart home device to a bedside lamp. “Infineon’s XENSIV radar sensors provide a great choice for healthcare applications that can accurately measure life signals such as heartbeat and heartbeat without touching the body or introducing privacy,” said Philipp von Schierstaedt, Vice President and Chief Radio Officer and Director General. ; Sensors in Infineon.

Quantum Computing & amp; HPC

QuantWare launched a 25 qubit quantum processing unit (QPU) based on superconducting technology. The company says a “powerful” quantum processor will allow companies to build their own quantum systems quickly. It includes the ability to add chips as desired, such as asymmetrical squid joints, Purcell filters, and custom qubit topology. Dedicated drive and flow lines provide full qubit control. “Building a large-scale, battery-powered quantum computer could cost about 45 million euros. Contralto creates a lower cost, opening up many new possibilities that could not be explored before,” said Matthijs Rijlaarsdam, Managing Director of QuantWare.

The Fraunhofer IAF-coordinated team is working to develop a compact, scalable quantum processor based on spin qubits that can be connected to classical computers. Funded with 16.1 million euros (~ $ 17.5 million), the SPINNING project aims to develop hardware with longer operating times and lower error rates, as well as low cooling requirements compared to current quantum systems. The quantum processor will initially be able to calculate at 10 qubits, then expand to 100 qubits and above, and be able to predict the products of complex quantum chemical reactions. “One of the goals of our work is to ensure the reliable operation of such an innovative quantum computer and to create a periphery to make computer power available to a wide group of users, for example through cloud computing,” said Rüdiger Quay, project coordinator. SPINNING and Fraunhofer IAF Executive Director. Other members of the group include Fraunhofer IISB, Forschungszentrum Jülich, Karlsruhe Institute of Technology, Konstanz University, Heidelberg University, Munich Technical University, Ulm University, Diamond Materials, NVision Imaging Technologies, Qinu, Stuttgart University, Quantum Brilliance, Swabian Instruments. , and 14 other partners in science and industry.

The National Supercomputing Mission of India deployed the PARAM Ganga petal supercomputer at the Roorkee Indian Institute of Technology. Important components used to build this system were manufactured and assembled in India along with a stack of software developed by the Center for Advanced Computer Development (C-DAC). The system has a peak of 1.66 petaflop and will be used for many engineering and scientific research.

Storage

Kioxia opened the 247 SAS SSD series of enterprise SSDs. Using Kioxia’s 5th generation BiCS FLASH 3D TLC flash memory, the PM7 series offers 4.2 GB / s sequential reads, up to 720K random read IOPS and 355K random write IOPS. They are available in contents up to 30.72 TB. The series is FIPS2 140-2 certified and is currently being tested for FIPS 140-3 certification.

Automotive & amp; security

Intel intends to make its Mobileye business public. Mobileye develops computer visual SoCs for automotive ADAS and autonomous driving. Intel bought the company in 2017. The number of shares to be offered and the price range of the proposed offer have not yet been determined.

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